The difference is a lot. 10/100 phys can be integrated directly into monlithic SOCs, so in a high IO chip the silicon can be essentially free. Gigabit phys are usually still exotic process, or so power hungry as to be unworkable to integrate. They are also large. Analog does not scale like digital - they have to be redesigned when the process shrinks, so often it lags behind the SOC geometries. So, it can cost a whole lot more. On the other hand, I agree with you, it seems a shame not to plan for the future.